LCMXO2-2000HC-4FTG256I MachXO2 FPGA IC Chip 206 75776 2112 256-LBGA

Features of LCMXO2-2000HC-4FTG256I

• High Performance, Flexible I/O Buffer
• Programmable sysIO™ buffer supports wide range of interfaces:
– LVCMOS 3.3/2.5/1.8/1.5/1.2
– LVTTL
– PCI
– LVDS, Bus-LVDS, MLVDS, RSDS, LVPECL
– SSTL 25/18
– HSTL 18
– Schmitt trigger inputs, up to 0.5 V hysteresis
• I/Os support hot socketing
• On-chip differential termination
• Programmable pull-up or pull-down mode
• Flexible On-Chip Clocking
• Eight primary clocks
• Up to two edge clocks for high-speed I/O interfaces (top and bottom sides only)
• Up to two analog PLLs per device with fractional-n frequency synthesis
– Wide input frequency range (7 MHz to 400 MHz)
• Non-volatile, Infinitely Reconfigurable
• Instant-on – powers up in microseconds
• Single-chip, secure solution
• Programmable through JTAG, SPI or I2C
• Supports background programming of non-volatile memory
• Optional dual boot with external SPI memory
• TransFR™ Reconfiguration
• In-field logic update while system operates
• Enhanced System Level Support
• On-chip hardened functions: SPI, I2C, timer/counter
• On-chip oscillator with 5.5% accuracy
• Unique TraceID for system tracking
• One Time Programmable (OTP) mode
• Single power supply with extended operating range
• IEEE Standard 1149.1 boundary scan
• IEEE 1532 compliant in-system programming
• Broad Range of Package Options
• TQFP, WLCSP, ucBGA, csBGA, caBGA, ftBGA, fpBGA, QFN package options
• Small footprint package options
– As small as 2.5 mm x 2.5 mm
• Density migration supported
• Advanced halogen-free packaging

Descriptions of LCMXO2-2000HC-4FTG256I

The MachXO2 PLDs are available in a broad range of advanced halogen-free packages ranging from the space
saving 2.5 mm x 2.5 mm WLCSP to the 23 mm x 23 mm fpBGA. MachXO2 devices support density migration
within the same package. Table 1-1 shows the LUT densities, package and I/O options, along with other key
parameters.

Environmental & Export Classifications of LCMXO2-2000HC-4FTG256I